Sage-Tips

What is the advantage to choose VLIW machine instead of superscalar architecture How does this affect hardware and software?

How does this affect hardware and compiler complexity? VLIW can issue multiple operations per cycle with simple hardware. Out-of-order superscalar need complex control logic. Independent operations are scheduled statically by the compiler into the same VLIW instruction.

What is the different between in order and out order superscalar processor?

More precisely, superscalar processors can start executing two or more instructions in the same cycle. Pipelined processors can execute more than one instruction at a time, but a non-superscalar pipelined processor will only start a single instruction in any given cycle.

What are the two different approaches used to issue multiple instructions per clock in a dynamically scheduled processor?

Two different approaches have been used to issue multiple instructions per clock in a dynamically scheduled processor. They are: Pipelining, so that two instructions can be processed in one clock cycle. Increase the logic to handle two instructions, including any possible dependences between the instructions.

What is the advantage of VLIW CPU over superscalar?

The big advantage of VLIW, then, is that a highly concurrent (parallel) implementation is much simpler and cheaper to build than equivalently concurrent RISC or CISC chips. VLIW is a simpler way to build a superscalar microprocessor .

What is the advantage of VLIW architecture?

Advantages : Reduces hardware complexity. Reduces power consumption because of reduction of hardware complexity. Since compiler takes care of data dependency check, decoding, instruction issues, it becomes a lot simpler.

What are the advantages and disadvantages of VLIW architecture?

VLIW has both advantages and disadvantages. The main advantage is the saving in hardware — the compiler now decides what can be executed in parallel, and the hardware just does it. There is no need to check for dependencies or decide on scheduling — the compiler has already resolved these issues.

What is in-order superscalar architecture?

An In-Order Superscalar is a Processor that fetches and runs multiple instructions from a thread of execution within the compiler-generated order.

How the superscalar operation improves the performance of a processor explain it in detail?

In contrast to a scalar processor that can execute at most one single instruction per clock cycle, a superscalar processor can execute more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to different execution units on the processor.

Why is VLIW beneficial?

VLIW has both advantages and disadvantages. The main advantage is the saving in hardware — the compiler now decides what can be executed in parallel, and the hardware just does it. This means that much more hardware can be devoted to useful computation, bigger on-chip caches etc., meaning faster processors.

What is the difference between superscalar processors and VLIW?

While superscalar processors execute instructions dynamically, VLIW uses static scheduling of program instructions. A superscalar processor is a microprocessor design for exploiting multiple instructions in one clock cycle, thus establishing an instruction-level parallelism in processors.

What is the difference between RISC and VLIW?

VLIW has a similar philosophy as RISC (Reduced Instruction Set Computer) because of its simple hardware and instructions, but the hard work in VLIW design is done by the compiler, unlike RISC and superscalar architectures.

How are instructions scheduled in superscalar architecture?

The scheduling of instructions in a superscalar architecture is done dynamically, at run time, by the processor. The superscalar architectures have mechanisms for fetching multiple instructions, determining dependencies between instructions and executing instructions in order. Here’s a handy analogy you can use to understand superscalar processing:

What are the disadvantages of VLIW processors?

Power consumption is low in VLIW processors. VLIW codes do not run well on different machines (i.e., code that runs on a machine with fewer functional units may not run well on machines with more function units or multiple latencies). This is mainly because of machine-compatibility of codes.